A semiconductor module such as the type described in U.S. Patent application Publication No. 2001/0054770 A1 and, for stacking purposes, uses a complex connecting frame and two additional basic layers, which each have a basic substrate and a wiring pattern. The connecting frame has vias from one of the basic substrates to the other basic substrate. Integrated semiconductor chips are electrically connected to the basic substrates and to their interposing patterns in such a way that a first semiconductor chip is partially surrounded by the connecting frame and the basic substrates, and a second semiconductor chip is mounted on the second basic substrate, with the complex connecting frame. In order to make it possible to provide the semiconductor stack with external contacts which are arranged such that they are flat, and thus to use the semiconductor module as a BGA (Ball Grid Array) component, a further substrate is provided in addition to the two basic substrates. This further substrate distributes the vias, which run vertically in the edge area of the module, in the two basic substrates and in the connecting frame such that they are flat on a lower surface of the further substrate.
One disadvantage of this known semiconductor module is the large number of at least three connecting interfaces between the three substrates and the connecting frame, which on the one hand must be adjusted with respect to one another and on the other hand must be electrically connected to one another, thus reducing the reliability of the known semiconductor module. A further disadvantage is that the height of the module cannot be reduced indefinitely, since three substrates and a connecting frame are required in order to stack two semiconductor chips one on top of the other, and this occupies a large amount of space.